Digi-Key Electronics to Host RVfpga Webinar on RISC-V Architecture and Implementation

Take a close look at the inner workings of the RISC-V processor core.

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Digi-Key Electronics

THIEF RIVER FALLS, Minn. – Digi-Key Electronics, which offers the world’s largest selection of electronic components in stock for immediate shipment, will host a RVfpga webinar in collaboration with Imagination Technologies on understanding RISC-V architecture and implementation on an FPGA. The webinar will take place on Wednesday, Feb. 23 at 2 p.m. CST and will be presented by Dr. Sarah Harris, associate professor of electrical and computer engineering at the University of Nevada, Las Vegas.

The RVfpga webinar will take a close look at the inner workings of the RISC-V processor core and ways to implement a soft RISC-V processor core in a target (Xilinx) FPGA device. Dr. Harris will cover the foundational knowledge that the next generation of programmers and engineers need to harness the potential of RISC-V, including how to do the following:

  • Target a commercial RISC-V core (SweRV EH1) and system-on-chip (SoC) to an FPGA
  • Program the RISC-V SoC
  • Add more functionality to the RISC-V SoC
  • Analyze and modify the RISC-V core and memory hierarchy

“We are pleased to present this RVfpga webinar as it will be a great resource on the topic of RISC-V for our customers and community,” said Y.C. Wang, director, global academic program for Digi-Key. “This presentation will help the next generation of programmers and engineers better understand how to utilize and experiment with the rich plethora of RISC-V products we have in stock.”

“RISC-V will pervade every level of computing during the next decade,” said Robert Owen, principal consultant: worldwide university program for Imagination Technologies. “This course provides the essential knowledge that students need about the architecture and then brings it to life through engaging and instructive labs using a real-world implementation.”

“RISC-V is open-source and royalty-free, and I am excited to share how this relatively new computer technology is enabling a new era of processor innovation on this RVfpga webinar,” said Dr. Harris. “I’m looking forward to seeing what new innovations engineers and makers can design with this more accessible open architecture option.”

Sarah Harris earned her M.S. and Ph.D. at Stanford University. She is the co-author of three popular textbooks: Digital Design and Computer Architecture, 2nd Edition (2007), ARM Edition (2015), and RISC-V Edition (2021). Her research interests include computer architecture and applications of embedded systems and machine learning to biomedical engineering and robotics.

To attend the webinar, submit a registration form. If you can't attend the live webinar, Digi-Key will send the recording after the event to those who register. The webinar will be presented in English. For more information about RISC-V, visit the landing page of resources available from Digi-Key.

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